The present invention relates to analog switches. More particularly, the present invention relates to linearizing response of analog switches.
Possible implementations of an analog switch may be to selectively transmit analog signals at the input of a sample and hold circuit or at the inputs of a multiplexer. In those circuits, noise generated by the analog switch can degrade the transmission analog signal. A significant source of noise in a circuit that includes a particular category of analog switches known as CMOS transmission gates is the distortion that occurs because of the switching gate capacitance currents at the switching thresholds of the switches. The characteristics of this noise is unpredictable because, at the switching thresholds, gate capacitance currents provide different noise results with different source impedances. For example, in an exemplary conventional circuit with an analog CMOS switch, this distortion is xe2x88x9269.5 dB with 50xcexa9 source impedance and xe2x88x9296 dB with 0xcexa9 source impedance. This variation of noise results for different source impedances reduces the predictability of distortion caused by the analog switch, increases the sensitivity of the switch to different source impedances and, generally, degrades the signal processing capability of the switch.
It would be desirable to provide an analog switch that processes a signal without changing gate-to-channel capacitance of the switch.
It would also be desirable to provide an analog switch that is substantially insensitive to changes in source impedance.
It is an object of the invention to provide an analog switch that processes a signal without changing the gate-to-channel capacitance of the switch.
It is also an object of this invention to provide an analog switch that is substantially insensitive to changes in source impedance.
A compensation circuit for compensating non-linear gate capacitance current in a CMOS switch is provided.
A method for maintaining a substantially constant gate capacitance of a CMOS switch with respect to a channel voltagexe2x80x94i.e., the voltage that is being transmitted by the switchxe2x80x94source resistance is provided. In this method, the CMOS switch includes an N-channel device and a P-channel device. The method includes compensating a non-linear gate capacitance current in the N-channel device at a first threshold level of an input voltage and compensating a non-linear gate capacitance current in the P-channel device at a second threshold level of input voltage.